The following is a special contribution to this blog by Josep Torrellas, Professor at the Departments of Computer Science and (by courtesy) Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. He is the Director of the Center for Programmable Extreme Scale Computing, and the Director of the Illinois-Intel Parallelism Center (I2PC).  Josep is a member of the Computing Community Consortium (CCC) Council. 

As part of the CCC’s ongoing support of visioning workshops, Alex Jones (University of Pittsburgh), Iris Bahar (Brown University), Srinivas Katkoori (University of South Florida), Patrick Madden (SUNY Binghamton), Diana Marculescu (Carnegie Mellon University), and Igor Markov (University of Michigan) have co-organized three workshops on Charting the Future of Electronic Design Automation. This series of workshops was co-sponsored by ACM SIGDA. The workshops were held in Pittsburgh, Pennsylvania, on March 7-8, 2013; in Austin, Texas, on June 1-2, 2013; and in Tampa, Florida, on February 21-22, 2014. The final report and a set of slides will soon be available.

Envisioning the Future of the Field

Device integration in silicon chips is increasing to unprecedented levels, and the trend is likely to continue for several generations. Existing Electronic Design Automation (EDA) techniques and tools cannot effectively harness the scale possible in today’s chips, and are totally incapable of dealing with the types of systems that we expect within ten years. Industry roadmaps are unclear on how to move forward. It is therefore necessary to develop novel, extreme-scale EDA concepts and techniques to facilitate the effective development of electronic systems of extreme-scale integration complexity. In this context, these three workshops have tried to imagine the novel design methods, innovative software tools, new manufacturing technologies, and re-designed education roadmaps and industry interactions that are needed to harness the 10¹⁵-device chips possible in future commercial products.

The third workshop tried to identify the paradigms and algorithms that are needed to dramatically reduce the cost of silicon, and to attain rapid system design — including push-button technology for non-leading-edge chips. Further, many core EDA-inspired algorithms have broad applicability, and can be used in a variety of important emerging fields, such as developing software-driven System-On-Chip (SOC) systems, formally verifying cyber-physical systems (such as cars, rockets, nuclear power systems and, generally, smart infrastructure), and addressing medical-related problems (such as in computational genomics, synthetic biology, or genetic design automation).

The same workshop argued that the research community has placed a significant investment in the development of new fabrication technologies to augment or replace silicon devices. A large number of promising candidate technologies are being put forward, such as spintronics, carbon nanotubes, and memristors. However, given the current state of these technologies, silicon is unlikely to disappear or be replaced soon. Future systems will likely integrate advanced forms of traditional technologies with some of these novel technologies. Moreover, the resulting environments will require extensive ecosystems of computer-aided design tools, similar to those painstakingly developed for conventional technologies over many years.

Changing Workforce, Markets, and Education

The first two workshops focused on educating students in this field and on collaboration with the semiconductor industry. The outcomes of the discussions on education are summarized in an invited paper in MSE-2013 entitled “Scaling the Impact of EDA Education’’. The paper describes the changes required in the EDA curriculum, the strategies for engaging more students already in the computer sciences and engineering into EDA, and the methods for building a pipeline of students into EDA. One intriguing approach is to use massively open online courses (MOOCs) to reach a wide audience and to share course material.

The second workshop focused on the semiconductor industry needs and on collaboration between industry and academia. Noel Menezes from Intel gave a keynote where he outlined where the industry is heading, and the types of professionals that are needed. The workshop found that we need comprehensive strategies to handle reliability, power management, and verification.

The Visioning Workshops

Each of the three workshops had an attendance of about 30–40 people. Attendees came from universities, industry (e.g., Intel, IBM, Synopsys, Cadence, and DWave Systems), and funding agencies (e.g., NSF, SRC, and DARPA). Keynote speakers included Bob Colwell (DARPA), Patrick Groeneveld (Synopsys), Noel Menezes (Intel), Jacob White (MIT), Bill Joyner (SRC), and Rob Rutenbar (University of Illinois).